The present invention relates to a fabrication method of a flat-panel-type display device, and more particularly to a display device which can form a large number of thin film transistors which differ in operational characteristics on a substrate with small number of steps and a fabrication method thereof.
Flat-panel-type display devices adopting various methods such as a display device capable of performing a high-definition color display for a notebook type computer or a display monitor, a liquid crystal display device which uses a liquid crystal panel as a display panel for a mobile phone, an organic electroluminescence display device (organic EL display device) which uses electroluminescence (particularly organic electroluminescence) elements or a field emission type display device (FED) which uses field emission elements have been already put into practice or in the process of studies for putting the display device into practice.
With respect to the flat-panel-type display device, there has been developed a so-called system-in-panel which directly builds a display region on which a large number of pixels which are constituted of a thin film transistor circuit are arranged in a matrix array and peripheral circuits (including for example, a scanning signal drive circuit, a video signal drive circuit for driving the pixels and other peripheral circuits which are arranged around the display region) and the like in an insulating substrate made of glass or the like. The transparent insulating substrate in which various kinds of thin film transistor circuits are built is also referred to as a thin film transistor (TFT) substrate or an active matrix substrate, wherein in general, the thin film transistors having various characteristics are built in the substrate using a low-temperature poly silicon semiconductor film. The substrate in which the thin film transistors are built in is also expressed as the TFT substrate or simply as the substrate in the explanation made hereinafter.
In building the pixel circuits which form the display region on the same substrate which constitutes the flat-panel-type display device and, at the same time, in building a large number of thin film transistor circuits including peripheral circuits (for example, the scanning signal drive circuit, the video signal drive circuit and other peripheral circuits) in a periphery of the substrate, channel regions which have threshold voltages which differ in response to operational performances of the respective circuits are formed on semiconductor layers of the same substrate.
As one method, there has been proposed a method in which a semiconductor layer of a thin film transistor forming portion of the circuit which does not require a high speed operation is formed of a poly silicon (p-Si) layer (having a relatively large particle size) (for example, formed by annealing using an excimer laser (ELA) using an amorphous silicon (a-Si) layer or a fine crystal poly-silicon layer as a precursor), and a channel region of the circuit which requires a high-speed operation is selectively pseudo-single-crystallized to form a pseudo-single-crystalline silicon semiconductor layer using a solid laser, a continuous oscillation laser or the like. Here, the pseudo-single-crystalline silicon semiconductor layer implies, although described in detail later, a semiconductor layer which grows relatively large crystals (having a strip-like shape, for example) compared to usual poly-silicon crystals which constitute so-called granular crystals but are not regarded as single crystals.
When the TFTs which differ in characteristics, that is, the TFTs which are built in the poly-silicon semiconductor film formed by a technique such as ELA, and the TFTs which are built in the pseudo-single-crystalline silicon semiconductor layer formed by using a solid laser, a continuous oscillation laser or the like are allowed to coexist on the same substrate, it is necessary to control the characteristics (mainly threshold voltages) of the respective TFTs.
Here, patent documents which disclose the related art on the pseudo-single-crystals, for example, J-P-A-2002-222959 (patent document 1), J-P-A-2003-124136 (patent document 2), J-P-A-2003-086505 (patent document 3) can be named.